The present invention is directed generally to digital video signal processing, and more particularly, to an on-screen display (OSD) processor having a color mapped mode, direct color mode, and 4:2:2 profile mode. The processor implements both color mapped OSD region processing capability and direct color OSD region processing capability, along with an ability to store quantizer coefficients for the 4:2:2 profile mode of a video decoder coupled to the OSD processor.
The MPEG-2 standard describes an encoding method that results in substantial bandwidth reduction by a subjective lossy compression followed by a lossless compression. The encoded, compressed digital data is subsequently decompressed and decoded in an MPEG-2 compliant decoder. Video decoding in accordance with the MPEG-2 standard is described in detail in commonly assigned U.S. Letters Pat. No. 5,576,765, entitled xe2x80x9cVideo Decoderxe2x80x9d, which is hereby incorporated herein by reference in its entirety.
MPEG-2 video decoder/display chips are typically designed with a secondary display processor used for creating an overlay on the display. The source for the overlay image is coded overlay data that resides in the same memory that holds the MPEG video references frames, input buffer, and user data storage. This secondary video, known in the industry as the on-screen display (OSD), is often used by a digital video system to convey information to a viewer such as television program schedules, viewing guide information, recording lists, headline news, sporting results, operational details, etc. When a customer is not viewing a full screen video program, the customer is probably interfacing with one of the OSD functions listed above.
Besides program video and audio quality, the OSD functions play a major part in a viewer""s perception of the overall quality of a digital video system. Thus, significant attention is given in the industry to the design and capabilities of the OSD features. This invention provides further enhancements to the conventional OSD processor and OSD features in order to establish commercial advantage of a digital video system employing the same.
Briefly summarized, this invention comprises in one aspect a digital video system comprising a display screen having a first overlay region and a second overlay region. The first overlay region of the display screen comprises a color mapped, on-screen display region and the second overlay region comprises a direct color OSD region. Preferably, the color mapped, OSD region and the direct color OSD region are produced by an OSD processor using an embedded memory which is shared by the regions.
In another aspect, the invention comprises an on-screen display (OSD) processor for processing OSD data of a digital video decode system. The OSD processor includes an embedded memory, write logic and read logic. The write logic writes color table data to the embedded memory when the OSD data comprises a color mapped mode and writes direct color bitmap data to the embedded memory when the OSD data comprises a direct color mode. The read logic reads color table data from the embedded memory for display when the OSD data is in color mapped mode and reads direct color bitmap data from the embedded memory for display when the OSD data comprises direct color mode. Thus, the embedded memory is alternately shared between OSD data in color mapped mode and OSD data in direct color mode, thereby allowing the OSD processor to provide both color mapped overlay regions and direct color overlay regions using the embedded memory.
In a further aspect, an on-screen display (OSD) processor is presented for processing OSD data of a digital video decode system having a video decoder. The OSD processor includes an embedded memory, and logic for employing the embedded memory during an OSD function of the digital video decode system. The OSD processor further includes logic for alternately employing the embedded memory during a 4:2:2 profile function of the video decoder when an image being decoded is in 4:2:2 format.
In yet another aspect, an on-screen display (OSD) processor is presented for processing OSD data of a digital video decode system. The OSD processor includes an embedded memory, write logic and read logic. The write logic writes direct color bitmap data into the embedded memory when the OSD data comprises a direct color description mode, while the read logic reads the direct color bitmap data from the embedded memory to an output of the OSD processor for display.
Processing methods and articles of manufacture encompassing the techniques of the above-outlined structures are also described and claimed herein.
To restate, an OSD processor is provided herein for a digital video decode system. This OSD processor has certain enhanced OSD capabilities. For example, provision is made for both color mapped and direct color capability so that both color mapped overlay regions and direct color overlay regions can be provided over a common display frame of an associated display of the digital video decode system. The OSD system includes logical implementation to store both color mapped and direct color data format in an embedded memory. This OSD bitmap data is processed and blended with decoded data to produce pixel data at the output of the decode system consisting of video data with overlayed graphics. Included within the direct color mode are features for selecting 4:2:0 or 4:2:2 bitmap format, as well as for activating pixel-by-pixel blending capabilities.
As part of the MPEG-2 syntax, an extra set of tables can be transmitted within the MPEG-2 stream prior to the reception of an actual 4:2:2 coded image. Pursuant to this invention, these xe2x80x9cquantization matrixxe2x80x9d tables are preferably stored in the OSD processor in a fashion similar to the storage of OSD colors. A unique feature of this design is thus to offer both the OSD functions, with provision for both mapped and direct color capability, and the 4:2:2 profile functions on a single chip, with the embedded memory structure required for both functions shared within the single device. The nature of the embedded memory is that it will only be used by one of the functions at any given time. Thus, three distinct uses for the OSD hardware are provided. The addition of the direct color OSD region processing capability along with the ability to store inverse quantizer coefficient data in conventional OSD hardware provides an economic and compact design as a whole, reducing the ultimate chip size of the MPEG decoder, while offering many options at a reasonable cost.